Enhanced low precision binary floating-point formatting

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United States of America Patent

PATENT NO 11775257
APP PUB NO 20200233642A1
SERIAL NO

16840847

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Abstract

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Techniques for operating on and calculating binary floating-point numbers using an enhanced floating-point number format are presented. The enhanced format can comprise a single sign bit, six bits for the exponent, and nine bits for the fraction. Using six bits for the exponent can provide an enhanced exponent range that facilitates desirably fast convergence of computing-intensive algorithms and low error rates for computing-intensive applications. The enhanced format can employ a specified definition for the lowest binade that enables the lowest binade to be used for zero and normal numbers; and a specified definition for the highest binade that enables it to be structured to have one data point used for a merged Not-a-Number (NaN)/infinity symbol and remaining data points used for finite numbers. The signs of zero and merged NaN/infinity can be “don't care” terms. The enhanced format employs only one rounding mode, which is for rounding toward nearest up.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Agrawal, Ankur White Plains, US 99 1002
Fleischer, Bruce Bedford Hills, US 18 29
Gopalakrishnan, Kailash San Jose, US 86 1044
Lee, Dongsoo White Plains, US 103 620
Mueller, Silvia Melitta Altdorf, DE 85 330

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