Frequency-locked loop and method for correcting oscillation frequency of output signal of frequency-locked loop

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United States of America Patent

PATENT NO 11722139
APP PUB NO 20220399897A1
SERIAL NO

17575646

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Abstract

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A frequency-locked loop (FLL) and a method for correcting an oscillation frequency of an output signal of the FLL are provided. The FLL includes a switched capacitor circuit, a first resistor set, a second resistor set, a determination circuit and a control circuit. The switched capacitor circuit includes a capacitor, and connection of the capacitor is switched according to the oscillation frequency. The first resistor set is configured to provide a first resistance, and the second resistor set is configured to provide a second resistance. The determination circuit is configured to generate a determination result according to the first resistance and the second resistance. The control circuit is configured to generate a control signal for correcting the first resistance and the second resistance according to the determination result, where the oscillation frequency is determined based on the capacitor and at least one of the first resistance and the second resistance.

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Patent Owner(s)

Patent OwnerAddress
MEDIATEK INCNO 1 DUSING RD 1ST SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Chien-Wei Hsinchu, TW 58 374
Hsueh, Yu-Li Hsinchu, TW 31 88
Hung, Chao-Ching Hsinchu, TW 14 24

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