Sawtooh electric field drift region structure for planar and trench power semiconductor devices
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United States of America Patent
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Feb 28, 2023
Grant Date -
Sep 30, 2021
app pub date -
Jun 13, 2021
filing date -
Nov 30, 2009
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Abstract
A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.
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