Memory device and clock locking method thereof

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United States of America Patent

PATENT NO 11456046
SERIAL NO

17225548

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Abstract

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A clock locking method of a memory device, may include performing an initial locking operation in a delay locked loop circuit before an internal voltage is stabilized, monitoring clock skew between a reference clock and a feedback clock using a window detection circuit after the internal voltage is stabilized, and performing a re-locking operation in the delay locked loop circuit using a dynamic delay control corresponding to the clock skew.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTDGYEONGGI DO SOUTH KOREA GYEONGGI-DO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Hundae Hwaseong-si, KR 12 53

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