Memory system and sending signal adjustment method

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United States of America Patent

PATENT NO 11404093
SERIAL NO

17200288

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A memory system in an embodiment includes; one or more memory chips; and a controller connected to the one or more memory chips, the controller including a first driver configured to send a sending signal to the one or more memory chips, a second driver configured to generate a boost signal that is added to the sending signal, and a control circuit configured to set an addition period for the boost signal based on information relevant to a characteristic of distortion that occurs in the sending signal to the one or more memory chips.

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Patent Owner(s)

Patent OwnerAddress
KIOXIA CORPORATION1-21 SHIBAURA 3-CHOME MINATO-KU TOKYO 108-0023

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ikeda, Shinichi Fujisawa, JP 69 214

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