Semiconductor device having a planar III-N semiconductor layer and fabrication method
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United States of America Patent
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Jul 19, 2022
Grant Date -
Jul 23, 2020
app pub date -
Oct 5, 2018
filing date -
Oct 5, 2017
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Abstract
A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer (101) and a buffer layer (102), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (1021); an array of nano structures (1010) epitaxially grown from the growth surface; a continuous planar layer (1020) formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (1030), epitaxially grown on the planar layer (1020).
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