Semiconductor device including a Fin-FET and method of manufacturing the same

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United States of America

PATENT NO 11373910
APP PUB NO 20200303259A1
SERIAL NO

16897229

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Abstract

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A method of forming a semiconductor device including a fin field effect transistor (FinFET), the method includes forming a first sacrificial layer over a source/drain structure of a FinFET structure and an isolation insulating layer. The first sacrificial layer is patterned, thereby forming an opening. A first liner layer is formed on the isolation insulating layer in a bottom of the opening and on at least side faces of the patterned first sacrificial layer. After the first liner layer is formed, forming a dielectric layer in the opening. After the dielectric layer is formed, removing the patterned first sacrificial layer, thereby forming a contact opening over the source/drain structure. A conductive layer is formed in the contact opening. The FinFET is an n-type FET, and the source/drain structure includes an epitaxial layer made of Si1-y-a-bGeaSnbM2y, wherein 0

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, I-Ming Hsinchu, TW 45 71
Fang, Ziwei Hsinchu, TW 191 2939
Hsiao, Meng-Hsuan Hsinchu, TW 46 151
Lin, Yu-Ming Hsinchu, TW 635 2287
Mineji, Akira Hsinchu, TW 34 291
Okuno, Yasutoshi Hsinchu, TW 142 941
Peng, Cheng-Yi Taipei, TW 114 2120

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