OLED display panel for minimizing area of internalconnection line part for connecting GIP dirving circuit located in active area and OLED display device comprising the same
Number of patents in Portfolio can not be more than 2000
United States of America
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Apr 19, 2022
Grant Date -
May 30, 2019
app pub date -
Oct 30, 2018
filing date -
Oct 30, 2018
priority date (Note) -
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Abstract
The present disclosure relates to an OLED display panel for minimizing the size of a bezel and includes: an active area including data lines, scan lines intersecting the data lines, and sub-pixels arranged at each intersection; and a stage of a GIP driving circuit distributed and arranged in a plurality of unit pixel regions driven by m (m being a natural number) scan lines in the active area, to supply scan pulses to the corresponding scan lines, wherein the active area further includes m GIP internal connection lines parts respectively adjacent to the m scan lines, and a plurality of internal connection lines for connecting elements constituting each stage is distributed and arranged in the m GIP internal connection line parts.
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