Method for managing the supply of information, such as instructions, to a microprocessor, and a corresponding system
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
Mar 15, 2022
Grant Date -
Mar 26, 2020
app pub date -
Sep 17, 2019
filing date -
Sep 17, 2019
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A processor interacts with a memory set including a cache memory, a first memory storing at least a first piece of information in a first information group, and a second memory storing at least a second piece of information in a second information group. In response to a first cache miss and following a first request from the processor for the first piece of information, the first piece of information obtained from the first memory is supplied to the processor. After a second request from the processor for the second piece of information, the second piece of information obtained from the second memory is supplied to the processor, even if the first information group is currently being transferred from the first memory for loading into the cache memory.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully