Low power active load

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11209485
APP PUB NO 20190346507A1
SERIAL NO

16476034

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Importance

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Abstract

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An active load circuit that includes a diode bridge having first through fourth nodes, wherein a voltage buffer is connected with the first node, a source current mirror is connected with the second node, the third node is configured for connection to a device under test (DUT), and a sink current mirror is connected with the fourth node. A first current mirror is connected with the source current mirror, and a second current mirror is connected with the sink current mirror. A first differential pair is connected with the first current mirror and includes an input connected with the DUT and a second input connected with the input voltage. A second differential pair is connected with the second current mirror and includes a first input connected with the DUT and a second input connected with the input voltage.

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Patent Owner(s)

Patent OwnerAddress
ELEVATE SEMICONDUCTOR INCSAN DIEGO CA 92123

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sullivan, Patrick G Forestville, US 8 5
Zhou, Kangfei San Diego, US 1 0

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