Non-volatile memory with silicided bit line contacts
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 23, 2021
Grant Date -
Dec 31, 2020
app pub date -
Jun 18, 2020
filing date -
Jan 30, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density devices and advanced logic processes.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully