Decomposed floating point multiplication

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United States of America Patent

PATENT NO 11169776
APP PUB NO 20190324723A1
SERIAL NO

16457318

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Abstract

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Systems, apparatuses and methods may provide for technology that in response to an identification that one or more hardware units are to execute on a first type of data format, decomposes a first original floating point number to a plurality of first segmented floating point numbers that are to be equivalent to the first original floating point number. The technology may further in response to the identification, decompose a second original floating point number to a plurality of second segmented floating point numbers that are to be equivalent to the second original floating point number. The technology may further execute a multiplication operation on the first and second segmented floating point numbers to multiply the first segmented floating point numbers with the second segmented floating point numbers.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Garegrat, Nitin N San Jose, US 8 78
Hickmann, Brian J Sherwood, US 25 173
Popescu, Valentina La Jolla, US 2 1
Rotzin, Michael Santa Clara, US 7 109
Urbanski, Maciej Gdansk, PL 5 22

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