Reduction of skew between positive and negative conductors carrying a differential pair of signals
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United States of America Patent
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Nov 2, 2021
Grant Date -
Feb 7, 2019
app pub date -
Apr 4, 2018
filing date -
Apr 4, 2018
priority date (Note) -
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Abstract
A processor includes a transmitter to transmit, to a receiver, a differential pair of signals including a positive signal transmitted across a positive conductor and a negative signal transmitted across a negative conductor. A first programmable analog delay circuit is coupled to the positive conductor to provide a first delay to the positive signal and a second programmable analog delay circuit is coupled to the negative conductor to provide a second delay to the negative signal. A controller receives data based on a bit error rate (BER) of the differential pair of signals as measured by a bit error checker of the receiver. In response to determining the BER is less than a threshold BER, the controller stores a first delay value to program the first delay and store a second delay value to program the second delay.
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