Duty cycle corrector and converter for differential clock signals
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United States of America Patent
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Oct 26, 2021
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N/A
app pub date -
Jan 14, 2021
filing date -
Nov 23, 2020
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Abstract
Various techniques are provided to correct the duty cycles and convert differential clock signals in synchronized systems. In one example, a method includes receiving an input differential clock signal having a distorted duty cycle. The method also includes adjusting the input differential clock signal to provide an output differential clock signal with a corrected duty cycle. The adjusting is performed in response to signals provided by a differential amplifier and a common mode amplifier of an analog feedback circuit receiving the output differential clock signal. Additional methods and systems are also provided.
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