Processor with memory controller including dynamically programmable functional unit
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United States of America Patent
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Jul 13, 2021
Grant Date -
Oct 26, 2017
app pub date -
May 9, 2017
filing date -
Dec 8, 2015
priority date (Note) -
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Abstract
A processor including a memory controller for interfacing an external memory and a programmable functional unit (PFU). The PFU is programmed by a PFU program to modify operation of the memory controller, in which the PFU includes programmable logic elements and programmable interconnectors. For example, the PFU is programmed by the PFU program to add a function or otherwise to modify an existing function of the memory controller enhance its functionality during operation of the processor. In this manner, the functionality and/or operation of the memory controller is not fixed once the processor is manufactured, but instead the memory controller may be modified after manufacture to improve efficiency and/or enhance performance of the processor, such as when executing a corresponding process.
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