Bias voltage connections in RF power amplifier packaging
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United States of America Patent
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Jun 8, 2021
Grant Date -
Nov 19, 2020
app pub date -
May 17, 2019
filing date -
May 17, 2019
priority date (Note) -
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Abstract
In integrating RF power amplifier circuits on a package, at least one bias voltage is coupled to at least one amplifier circuit on the package via two or more pins/connectors. In particular, at least one of a gate and drain bias voltage is coupled to one or more amplifier circuits via at least two pins/connectors. In some embodiments, the two or more bias voltage pins/connectors are connected together on the package, placing the pins/connectors in parallel, which reduces an inductance associated with the pins/connectors. In some embodiments, at least of the two pins/connectors connected to the same bias voltage are disposed on either side of an RF signal pin/conductor, simplifying the routing of signals on the package, affording greater flexibility of placement and routing on the package.
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