Process-invariant delay cell
Number of patents in Portfolio can not be more than 2000
United States of America
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app pub date -
Jun 29, 2018
filing date -
Jun 29, 2018
priority date (Note) -
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Abstract
An integrated circuit (IC) device includes a first resistive strip having an input terminal and an output terminal. The IC device further includes a second resistive strip having a terminal coupled to a voltage. The second resistive strip may be coplanar with the first resistive strip. The IC device further includes a capacitor formed by the first resistive strip and the second resistive strip.
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International Classification(s)
- 2018 Application Filing Year
- H01L Class
- 30734 Applications Filed
- 24554 Patents Issued To-Date
- 79.90 % Issued To-Date
Cited Art Landscape
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- 0 Citation Count
- H01L Class
- 0 % this patent is cited more than
- 4 Age
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