System and method of duplicate circuit block swapping for noise reduction
Number of patents in Portfolio can not be more than 2000
United States of America
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app pub date -
Dec 13, 2018
filing date -
Dec 13, 2018
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An integrated circuit including at least one circuit node, multiple duplicate circuit blocks integrated on the integrated circuit in close proximity with each other, each including at least one device that is susceptible to random telegraph noise (RTN), and a switch circuit that swaps electrical coupling of the duplicate circuit blocks, one at a time, to the at least one circuit node in sequential cycles of a clock signal. The duplicate circuit blocks may be large functional blocks, such as an oscillator or a comparator or the like, or limited to circuits including RTN susceptible devices, such as differential pairs or the like. Each duplicate circuit block may include any number of connections for coupling to corresponding circuit nodes. The swapping may further include chopping in which multiple inputs are swapped with each other while multiple outputs are swapped with each other in consecutive clock cycles.
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International Classification(s)
- 2018 Application Filing Year
- H03B Class
- 315 Applications Filed
- 263 Patents Issued To-Date
- 83.50 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H03B Class
- 0 % this patent is cited more than
- 4 Age
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