Integrated circuitry comprising an array, method of forming an array, method of forming DRAM circuitry, and method used in the fabrication of integrated circuitry
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United States of America Patent
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Aug 20, 2020
Grant Date -
Aug 20, 2020
app pub date -
May 7, 2020
filing date -
Sep 24, 2018
priority date (Note) -
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Abstract
Integrated circuitry comprising an array comprises a plurality of conductive vias. Individual of the vias comprise an upper horizontal perimeter comprising opposing end portions. One of the opposing end portions comprises opposing straight sidewalls. The other of the opposing end portions comprises opposing curved sidewalls that join with the opposing straight sidewalls of the one opposing end portion. Other embodiments, including methods, are disclosed.
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