Method for performing power saving control in a memory device, associated memory device and memory controller thereof, and associated electronic device
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United States of America Patent
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Mar 2, 2021
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N/A
app pub date -
Feb 12, 2019
filing date -
Jun 11, 2018
priority date (Note) -
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Abstract
A method for performing power saving control in memory device, the associated memory device and memory controller thereof, and the associated electronic device are provided, where the method is applicable to the memory controller, and the memory device includes the memory controller and a non-volatile (NV) memory. The method may include: during transmitting to a host device, sending end of burst (EOB)-related symbols to the host device, in order to notify the host device of EOB; controlling a physical layer (PHY) circuit to turn off a clock source within the PHY circuit, in order to save power, wherein the PHY circuit is positioned in a transmission interface circuit within the memory controller, and the transmission interface circuit is arranged to perform communications with the host device for the memory device; and when receiving a trigger signal from the host device, utilizing the PHY circuit to turn on the clock source.
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