Methods and apparatus for electro-static discharge path detection
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United States of America Patent
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Jul 14, 2020
Grant Date -
Dec 6, 2018
app pub date -
Jun 5, 2018
filing date -
Jun 6, 2017
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Abstract
A method for fabricating a semiconductor structure includes when a chip under test releases an ESD current, detecting position information of photons emitted from the chip under test due to releasing of the ESD current; acquiring an image of an ESD path based on the detected position information of the photons; and determining whether the ESD path corresponding to the chip under test is normal based on the image of the ESD path and a layout image of the chip under test.
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