Wirelessly synchronized clock networks

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10687293
APP PUB NO 20190223128A1
SERIAL NO

16363116

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Importance

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Abstract

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A system includes a first device comprising a first clock generating circuit and a transmitter circuit, and a plurality of second devices, each comprising a respective receiver circuit and a respective second clock generating circuit. The first clock generating circuit may be configured to generate a first clock signal, which may provide internal clocking for the first device. The transmitter circuit may be configured to generate a synchronization signal in response to the first clock signal and wirelessly transmit a broadcast signal communicating only the synchronization signal. The respective receiver circuit may be configured to receive the broadcast signal and present a recovered synchronization signal to the respective second clock generating circuit. The respective second clock generating circuit may be configured to generate a respective intermediate clock signal, synchronize the respective intermediate clock signal with the recovered synchronization signal, and generate a respective second clock signal that provides internal clocking for the second device.

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Patent Owner(s)

Patent OwnerAddress
INTEGRATED DEVICE TECHNOLOGY INCSAN JOSE CA 95138

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ayache, Elie Santa Clara, US 5 86
Bal, Jagdeep Saratoga, US 14 137
Van, Keulen Eduard Morgan Hill, US 3 4

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