Large cluster persistence during placement optimization of integrated circuit designs
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United States of America Patent
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Jun 16, 2020
Grant Date -
Jan 24, 2019
app pub date -
Sep 25, 2018
filing date -
Jan 29, 2016
priority date (Note) -
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Abstract
The disclosed herein relates to method for persistence during placement optimization of an integrated circuit design. The method comprises performing cluster operation by grouping of a plurality of cells into a plurality of mobs. The method further comprises performing a spreading operation by moving the plurality of mobs and the plurality of cells simultaneously to optimize empty space of the integrated circuit design.
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