Memory device and programming method
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United States of America Patent
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Jun 2, 2020
Grant Date -
N/A
app pub date -
Jan 30, 2019
filing date -
Jun 29, 2018
priority date (Note) -
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Abstract
Disclosed is a memory device. The memory device includes a memory cell array that includes a target cell, a row decoder that drive a word line, and a write driver and sense amplifier that are configured to drive a bit line and a source line. The row decoder is configured to drive the word line in a first program operation and a second program operation. Between a start of the first program operation and an end of the second program operation, the write driver and sense amplifier are configured to continuously drive a bit line connected to the target cell with a second driving voltage or drive a source line connected to the target cell with a third driving voltage.
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