Virtual drain for decreased harmonic generation in fully depleted SOI (FDSOI) RF switches
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United States of America Patent
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May 19, 2020
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app pub date -
Jul 10, 2018
filing date -
Jul 10, 2018
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Abstract
The present disclosure relates to semiconductor structures and, more particularly, to virtual drains for decreased harmonic generation in fully depleted SOI (FDSOI) RF switches and methods of manufacture. The structure includes one or more active devices on a semiconductor on insulator material which is on top of a substrate; and a virtual drain region composed of a well region within the substrate and spaced apart from an active region of the one or more devices, the virtual drain region configured to be biased to collect electrons which would accumulate in the substrate.
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