Thyristor volatile random access memory and methods of manufacture
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United States of America
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Jan 7, 2020
Grant Date -
Nov 8, 2018
app pub date -
Jun 21, 2018
filing date -
Jun 21, 2018
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Abstract
Operations with reduced current overall are performed on single thyristor memory cells forming a volatile memory cell cross-point array. A first voltage is applied across a first group of memory cells for the operation and a lower second voltage is applied across other groups of memory cells. The first voltage is then applied across a second group of memory cells while the second voltage is applied across the other groups including the first group of memory cells and repeated until the operations covers all the groups.
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