Method of forming vias in silicon carbide and resulting devices and circuits
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United States of America Patent
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Jul 30, 2019
Grant Date -
Jan 12, 2017
app pub date -
Sep 26, 2016
filing date -
Apr 11, 2000
priority date (Note) -
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Abstract
A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device including a Group III-V semiconductor layer on a surface on a silicon carbide substrate, wherein the semiconductor device defines at least one via through the silicon carbide substrate and the epitaxial layer.
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