Memory management

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10311241
APP PUB NO 20180157848A1
SERIAL NO

15701517

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A system on a chip (SoC) and method of operation are described. A data processor has a processor data word size of p×octets and is configured to handle data items having a data item size which is a non-integer multiple of the processor data word size. A memory controller is configured to write or read data items to a memory as multiples of m×octets. Data can be sent between the data processor and the memory controller on a bus. A data protection code generator is configured to generate a data protection code for a data item generated by the data processor before transmitting the data item and the data protection code over the bus to the memory controller which writes at least one octet including at least a portion of the data item and at least a portion of the data protection code to an address. A data protection code checker is configured to receive a read data protection code and a read data item and to check the read data item for an error using the read data protection code. The memory controller reads at least one octet including at least a portion of the read data item and at least a portion of the read data protection code from a read address.

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Patent Owner(s)

Patent OwnerAddress
NXP USA INC6501 WILLIAM CANNON DRIVE AUSTIN TX 78735

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fader, Joachim Munich, DE 12 91
Krutsch, Robert Munich, DE 10 141
Wendel, Dirk Munich, DE 23 100

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