Memory testing method and memory apparatus therefor
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United States of America Patent
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Apr 30, 2019
Grant Date -
Jan 10, 2019
app pub date -
Jul 5, 2017
filing date -
Jul 5, 2017
priority date (Note) -
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Abstract
A memory testing method for testing a memory apparatus configured with an auxiliary testing circuit is provided. The memory testing method includes: reading a test data from a memory array of the memory; and encoding the test data into an encoded data by the auxiliary testing circuit, wherein the encoded data comprises a first piece data and a second piece data. The encoded data is encoded to include a first piece data and a second piece data, where the first piece data indicates a number of a binary state in the read test data, and the second piece data indicates an error bit in the read test data. In addition, a memory apparatus for the memory testing method is also provided.
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