Method and apparatus for unneeded block prediction in a computing system having a last level cache and a multi-level system memory
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United States of America Patent
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Apr 16, 2019
Grant Date -
Mar 30, 2017
app pub date -
Sep 25, 2015
filing date -
Sep 25, 2015
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Abstract
An apparatus is described. The apparatus includes a last level cache and a memory controller to interface to a multi-level system memory. The multi-level system memory has a caching level. The apparatus includes a first prediction unit to predict unneeded blocks in the last level cache. The apparatus includes a second prediction unit to predict unneeded blocks in the caching level of the multi-level system memory.
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