ESD protection circuit
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United States of America Patent
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Apr 2, 2019
Grant Date -
Mar 14, 2019
app pub date -
Dec 22, 2017
filing date -
Sep 8, 2017
priority date (Note) -
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Abstract
An electrostatic protection circuit is disclosed. The electrostatic protection circuit includes delay circuitry coupled between a supply voltage node and a fixed voltage node. The electrostatic protection circuit also includes latch circuitry made up of current-limiting circuitry that includes a gallium arsenide transistor and a latch. The current-limiting circuitry and the latch are coupled between the supply voltage node and the fixed voltage node, and the current-limiting circuitry is also coupled to the delay circuitry. The electrostatic protection circuit further includes discharge circuitry coupled between the supply voltage node and the fixed voltage node and to the latch, wherein the latch is configured to drive the discharge circuitry to short the supply voltage node to the fixed voltage node during an electrostatic discharge event, and the current-limiting circuitry is configured to limit latch current from the supply voltage node to the latch during normal operation.
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