ESD protection circuit
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United States of America Patent
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Mar 19, 2019
Grant Date -
Apr 26, 2018
app pub date -
Mar 1, 2017
filing date -
Oct 24, 2016
priority date (Note) -
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Abstract
An ESD protection circuit has a diode that includes an anode connected to a first power-supply line and a cathode connected to a second power-supply line. A metal-oxide-semiconductor (MOS) transistor is connected in series with the diode. A trigger circuit is configured to output a trigger signal to a gate of the MOS transistor in synchronization with a surge on the first power-supply line. A first resistor and a first capacitor are connected in series between the first power-supply line and the second power-supply line. A well region, in which the source and the drain of the MOS transistor are disposed, is connected to a connection point between the first resistor and the first capacitor. A potential of the connection point varies so that a forward voltage is applied to a p-n junction between the well region and the source of the MOS transistor to correspond with the surge.
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