DRAM data path sharing via a split local data bus

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United States of America Patent

PATENT NO 10217493
APP PUB NO 20180218759A1
SERIAL NO

15940811

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Abstract

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Provided is memory device and a memory bank, comprising a global data bus, and a local data bus split into two parts, wherein the local data bus is configurable to direct signals to the global data bus. Provided also is a method in which signals are received in a local data bus that is split into two parts, and the signals are directed from the local data bus to the global data bus. Provided also is a computational device comprised of a processor and the memory device.

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Patent Owner(s)

Patent OwnerAddress
TAHOE RESEARCH LTDBLANCHARDSTOWN CORPORATE PARK 2 PLAZA 255 SUITE 2A DUBLIN D15 YH6H

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lu, Shih-Lien L Portland, US 82 1765
Tomishima, Shigeki Portland, US 171 3026
Wu, Wei Portland, US 1105 10307

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