Frequency division circuit, method of controlling frequency division circuit, and analog electronic timepiece

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United States of America Patent

PATENT NO 10180661
APP PUB NO 20160342139A1
SERIAL NO

15072749

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A frequency division circuit includes a first frequency division circuit which divides a frequency of a reference signal that is generated by an oscillation circuit. An input/output terminal outputs an output signal of the first frequency division circuit for testing. A selection circuit outputs as an intermediate signal one of a first intermediate signal which is input from the input/output output terminal, and a second intermediate signal which is an output signal of the first frequency division circuit. A second frequency division circuit divides a frequency of the intermediate signal output from the selection circuit. A switching time count circuit begins counting a predetermined amount of time after the second frequency division circuit starts frequency-dividing the intermediate signal and, after elapse of the predetermined amount of time, switches the intermediate signal output from the selection circuit from the first intermediate signal to the second intermediate signal.

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Patent Owner(s)

Patent OwnerAddress
SEIKO WATCH CORPORATION5-11 GINZA 4-CHOME CHUO-KU TOKYO

International Classification(s)

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  • 2016 Application Filing Year
  • G04G Class
  • 295 Applications Filed
  • 212 Patents Issued To-Date
  • 71.87 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances201620172018201920202021202220230255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sakumoto, Kazumi Chiba, JP 83 1254

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Patent Citation Ranking

  • 1 Citation Count
  • G04G Class
  • 40 % this patent is cited more than
  • 6 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges2301 - 1000.20.40.60.811.21.41.61.822.22.42.62.833.2

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