III-nitride light emitting device including porous semiconductor
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United States of America Patent
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Oct 2, 2018
Grant Date -
Sep 29, 2016
app pub date -
Jun 1, 2016
filing date -
Dec 4, 2007
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Abstract
A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.
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