Method for forming a field effect transistor device having an electrical contact

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United States of America Patent

PATENT NO 10090393
APP PUB NO 20170141199A1
SERIAL NO

15345782

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Abstract

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A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.

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Patent Owner(s)

Patent OwnerAddress
IMEC VZWKAPELDREEF 75 3001 LEUVEN BELGIUM

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Armini, Silvia Heverlee, BE 17 292
Chan, Boon Teik Leuven, BE 70 145
Demuynck, Steven Aarschot, BE 12 77
Peter, Antony Premkumar Heverlee, BE 5 24
Schaekers, Marc Heverlee, BE 7 368
Tao, Zheng Heverlee, BE 29 49
Witters, Liesbeth Lubbeek, BE 26 328

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