Jae Hak Yee
Inventor
Stats
- 34 US patents issued
- 36 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 34 US Patents Issued
- 36 US Applications Filed
- 1015 Total Citation Count
- Feb 6, 2012 Most Recent Filing
- Nov 19, 1999 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
AMKOR TECHNOLOGY, INC. | 1
6 4 1 1 1 1 | 1999
2000 2001 2002 2003 2004 2006 |
St Assembly Test Services Pte Ltd | 2
2 | 2002
2003 |
STATS CHIPPAC LTD. | 1
| 2010
|
ST ASSEMBLY TEST | 1
| 2000
|
STATS CHIPPAC PTE. LTE. | 1
4 2 6 10 6 4 4 2 2 | 2000
2002 2003 2006 2007 2008 2009 2010 2011 2012 |
BANK OF AMERICA, N.A. | 1
1 1 1 | 2002
2003 2004 2006 |
Inventor Addresses
Address | Duration |
---|---|
Mansion, SG | Apr 01, 04 - Apr 01, 04 |
S.K. Mansion, SG | Nov 11, 03 - Nov 11, 03 |
Sam-Kiang Mansion, SG | Feb 03, 04 - Feb 03, 04 |
Seoul, KR | Sep 10, 02 - Jul 21, 09 |
Shanghai, CN | Jun 11, 09 - Feb 03, 15 |
Singapore, KR | Jan 02, 03 - Feb 22, 05 |
Singapore, SG | Feb 21, 02 - Dec 01, 15 |
Technology Profile
Technology | Matters | |
---|---|---|
H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 36 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
9202776 | 2015 | Stackable multi-chip package system | 0 |
8946878 | 2015 | Integrated circuit package-in-package system housing a plurality of stacked and offset integrated circuits and method of manufacture therefor | 2 |
8937372 | 2015 | Integrated circuit package system with molded strip protrusion | 0 |
8847413 | 2014 | Integrated circuit package system with leads having multiple sides exposed | 0 |
8810019 | 2014 | Integrated circuit package system with stacked die | 0 |
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