Patrick Vannier
Inventor
Stats
- 4 US patents issued
- 5 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 4 US Patents Issued
- 5 US Applications Filed
- 37 Total Citation Count
- Apr 21, 2014 Most Recent Filing
- Mar 26, 2009 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
ST MICROELECTRONICS CROLLES SAS | 1
| 2009
|
STMICROELECTRONICS (CROLLES 2) SAS | 1
6 2 | 2009
2011 2014 |
Inventor Addresses
Address | Duration |
---|---|
Le Versoud, FR | Oct 01, 09 - Oct 20, 15 |
Technology Profile
Technology | Matters | |
---|---|---|
H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 5 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
9165883 | 2015 | Interconnection structure for an integrated circuit | 10 |
2014/0225,278 | 2014 | INTERCONNECTION STRUCTURE FOR AN INTEGRATED CIRCUIT | 2 |
8765604 | 2014 | Interconnection structure for an integrated circuit | 9 |
8492264 | 2013 | Method for forming interconnection levels of an integrated circuit | 0 |
8461046 | 2013 | Process for producing a metallization level and a via level and corresponding integrated circuit | 1 |
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