James A Valerio
Inventor
Stats
- 1 US patents issued
- 30 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 1 US Patents Issued
- 30 US Applications Filed
- 340 Total Citation Count
- May 13, 2024 Most Recent Filing
- Dec 14, 1993 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| INTEL CORPORATION | 1
1 3 | 1993
2015 2016 |
Inventor Addresses
| Address | Duration |
|---|---|
| Hillsboro, CA, US | Oct 04, 18 - Oct 04, 18 |
| Hillsboro, OR, US | Dec 15, 16 - Oct 31, 24 |
| North Plains, OR, US | Aug 15, 19 - Jun 07, 22 |
| Northplains, OR, US | Apr 09, 20 - Nov 22, 22 |
| Portland, OR | Aug 13, 96 - Aug 13, 96 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 29 |
| G06T: | IMAGE DATA PROCESSING OR GENERATION, IN GENERAL | 24 |
| G09G: | ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION | 5 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2024/0362,741 | 2024 | THREAD SCHEDULING OVER COMPUTE BLOCKS FOR POWER OPTIMIZATION | 0 |
| 11995737 | 2024 | Thread scheduling over compute blocks for power optimization | 0 |
| 11508338 | 2022 | Register spill/fill using shared local memory space | 0 |
| 11494232 | 2022 | Memory-based software barriers | 0 |
| 11436695 | 2022 | Coarse grain coherency | 0 |
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