Tsutomu Sasao
Inventor
Stats
- 6 US patents issued
- 6 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 6 US Patents Issued
- 6 US Applications Filed
- 58 Total Citation Count
- Aug 19, 2015 Most Recent Filing
- Mar 31, 2004 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| KYUSHU INSTITUTE OF TECHNOLOGY | 6
| 2007
|
| MEIJI UNIVERSITY | 2
| 2015
|
| KITAKYUSHU FOUNDATION FOR THE ADVANCEMENT OF INDUSTRY, SCIENCE AND TECHNOLOGY | 4
| 2004
|
Inventor Addresses
| Address | Duration |
|---|---|
| Fukuoka, JP | Jul 26, 07 - Jun 23, 11 |
| Fukuoka-shi, JP | - |
| Iizuka, JP | Oct 09, 12 - May 06, 14 |
| Kawasaki, JP | Jan 09, 18 - Jan 09, 18 |
| Kawasaki-shi, JP | Sep 21, 17 - Sep 21, 17 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 6 |
| G11C: | STATIC STORES | 2 |
| H03K: | PULSE TECHNIQUE | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 9865350 | 2018 | Content addressable memory, an index generator, and a registered information update method | 0 |
| 2017/0271,011 | 2017 | A CONTENT ADDRESSABLE MEMORY, AN INDEX GENERATOR, AND A REGISTERED INFORMATION UPDATE METHOD | 3 |
| 8719549 | 2014 | Device to reconfigure multi-level logic networks, method to reconfigure multi-level logic networks, device to modify logic networks, and reconfigurable multi-level logic network | 1 |
| 8352677 | 2013 | Associative memory | 2 |
| 8285922 | 2012 | Address generator using LUT cascade logic network | 0 |
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