Ashwini Sarathy
Inventor
Stats
- 0 US patents issued
- 3 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 0 US Patents Issued
- 3 US Applications Filed
- 8 Total Citation Count
- May 13, 2015 Most Recent Filing
- Apr 6, 2009 Earliest Filing
Work History
Inventor Addresses
Address | Duration |
---|---|
Hillsboro, OR, US | Jan 07, 10 - Sep 17, 15 |
Technology Profile
Technology | Matters | |
---|---|---|
G06F: | ELECTRIC DIGITAL DATA PROCESSING | 2 |
H04L: | TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION | 3 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
2015/0263,972 | 2015 | Fault and Variation Tolerant Energy and Area Efficient Links for Network-on-Chips | 0 |
2011/0191,646 | 2011 | Fault-and Variation-Tolerant Energy - and Area-Efficient Links for Network-on-Chips | 5 |
2010/0002,581 | 2010 | Method for Inter-Router Dual-Function Energy- and Area-Efficient Links for Network-on-Chips | 0 |
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