Andrea Redaelli
Inventor
Stats
- 57 US patents issued
- 157 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 57 US Patents Issued
- 157 US Applications Filed
- 703 Total Citation Count
- Jul 30, 2024 Most Recent Filing
- Jun 9, 2009 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| MORGAN STANLEY SENIOR FUNDING, INC. | 3
2 | 2016
2017 |
| STMICROELECTRONICS S.R.L. | 1
| 2009
|
| U.S. BANK NATIONAL ASSOCIATION | 4
7 2 3 | 2014
2015 2016 2017 |
| MICRON TECHNOLOGY, INC. | 6
4 8 10 8 13 14 13 8 | 2009
2010 2011 2012 2013 2014 2015 2016 2017 |
| OVONYX MEMORY TECHNOLOGY, LLC | 2
4 4 2 | 2009
2012 2014 2015 |
Inventor Addresses
| Address | Duration |
|---|---|
| CALOLZIOCORTE (LC), IT | Apr 02, 15 - Apr 02, 15 |
| Calolzicorte, IT | Jan 08, 15 - Apr 11, 17 |
| Calolziocorte (LC), IT | Jun 30, 11 - Feb 11, 21 |
| Calolziocorte (Lc), IT | Feb 09, 12 - Jan 23, 25 |
| Calolziocorte, IT | Aug 14, 12 - Feb 04, 25 |
| Caloziocorte, IT | Sep 09, 14 - Sep 09, 14 |
| Casatenovo (LC), IT | Jan 31, 19 - Oct 21, 21 |
| Casatenovo (Lc), IT | Dec 21, 17 - Jun 02, 22 |
| Casatenovo, IT | May 23, 13 - Oct 24, 23 |
| Castatenovo, IT | Dec 04, 14 - Jan 03, 19 |
| Castenovo, IT | May 13, 14 - May 13, 14 |
| Lecco (LC), IT | Jul 01, 10 - Apr 13, 17 |
| Lecco, IT | Apr 01, 10 - Apr 17, 18 |
| Milan, IT | Mar 01, 22 - Apr 01, 25 |
| Milano, IT | May 20, 21 - Feb 06, 25 |
| Via San Giovanni Bosco 2, IT | Aug 03, 17 - May 03, 18 |
| Via San Giovanni Bosco, IT | May 03, 18 - Jun 05, 18 |
| Via san Giovanni Bosco, IT | Jan 30, 18 - Jan 30, 18 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G11C: | STATIC STORES | 89 |
| H01H: | ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES | 4 |
| H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 122 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 12266402 | 2025 | Phase change memory device with improved retention characteristics and related method | 0 |
| 2025/0048,940 | 2025 | PROCESS FOR COINTEGRATION OF TWO PHASE CHANGE MEMORY (PCM) ARRAYS HAVING DIFFERENT PHASE CHANGE MATERIALS, AND IN-MEMORY COMPUTATION SYSTEM UTILIZING THE TWO PCM ARRAYS | 0 |
| 12219883 | 2025 | Techniques for forming self-aligned memory structures | 0 |
| 2025/0031,383 | 2025 | ACCESS LINE FORMATION FOR A MEMORY ARRAY | 0 |
| 2024/0422,992 | 2024 | MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT | 0 |
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