Ludmil Nikolov
Inventor
Stats
- 15 US patents issued
- 16 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 15 US Patents Issued
- 16 US Applications Filed
- 125 Total Citation Count
- Jan 15, 2016 Most Recent Filing
- Jan 17, 2006 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| DIALOG SEMICONDUCTOR GMBH | 6
2 5 1 1 | 2011
2012 2013 2015 2016 |
| Dialog Semiconductor B.V. | 1
1 | 2013
2015 |
| LATTICE SEMICONDUCTOR CORPORATION | 7
2 | 2006
2009 |
Inventor Addresses
| Address | Duration |
|---|---|
| Chippenham, GB | Jul 19, 07 - Mar 27, 18 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G01R: | MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES | 1 |
| G05F: | SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES | 8 |
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 5 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 9929590 | 2018 | Dual input RTC supply generation with replica power path and autonomous mode of operation from the system supply | 1 |
| 9671801 | 2017 | Apparatus and method for a voltage regulator with improved power supply reduction ratio (PSRR) with reduced parasitic capacitance on bias signal lines | 23 |
| 9454170 | 2016 | Load transient, reduced bond wires for circuits supplying large currents | 0 |
| 9372491 | 2016 | Maintaining the resistor divider ratio during start-up | 1 |
| 2016/0132,064 | 2016 | Load Transient , Reduced Bond Wires for Circuits Supplying Large Currents | 0 |
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