Alana Nakata
Inventor
Stats
- 17 US patents issued
- 23 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 17 US Patents Issued
- 23 US Applications Filed
- 319 Total Citation Count
- Apr 18, 2019 Most Recent Filing
- May 6, 2008 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| INTERNATIONAL RECTIFIER CORPORATION | 2
| 2008
|
| SIEMENS INDUSTRY, INC. | 2
| 2011
|
| EFFICIENT POWER CONVERSION CORPORATION | 8
3 4 2 13 2 | 2010
2011 2012 2013 2014 2015 |
Inventor Addresses
| Address | Duration |
|---|---|
| Redondo Beach, CA, US | Nov 12, 09 - Mar 24, 20 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| B23K: | SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM | 1 |
| H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 22 |
| H02H: | EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 10600674 | 2020 | Semiconductor devices with back surface isolation | 0 |
| 2019/0252,238 | 2019 | SEMICONDUCTOR DEVICES WITH BACK SURFACE ISOLATION | 0 |
| 10312131 | 2019 | Semiconductor devices with back surface isolation | 4 |
| 10312260 | 2019 | GaN transistors with polysilicon layers used for creating additional components | 2 |
| 10312335 | 2019 | Gate with self-aligned ledge for enhancement mode GaN transistors | 0 |
We are sorry but your current selection exceeds the maximum number of portfolios (0) for this membership level.
>
Upgrade to our Level for up to -1 portfolios!.