Yoshikuni Nakadaira
Inventor
Stats
- 7 US patents issued
- 11 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 7 US Patents Issued
- 11 US Applications Filed
- 129 Total Citation Count
- Jul 7, 2017 Most Recent Filing
- Jul 25, 1996 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
Teresa, Inc. | 1
| 2011
|
INVENSAS CORPORATION | 2
| 2011
|
KABUSHIKI KAISHA TOSHIBA | 1
| 1996
|
TESSERA, INC. | 9
2 2 1 1 | 2011
2014 2015 2016 2017 |
SAMSUNG ELECTRONICS CO., LTD. | 1
| 2006
|
TESSERA RESEARCH LLC | 1
| 2011
|
Inventor Addresses
Address | Duration |
---|---|
Hodogaya-Ku, JP | Jun 21, 12 - Sep 15, 15 |
Suwon-si, KR | Jul 13, 06 - Jul 13, 06 |
Yokohama, JP | Jun 09, 98 - Oct 26, 17 |
Technology Profile
Technology | Matters | |
---|---|---|
B23K: | SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM | 2 |
H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 11 |
H05K: | PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS | 3 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
2017/0309,593 | 2017 | Semiconductor chip assembly and method for making same | 2 |
9716075 | 2017 | Semiconductor chip assembly and method for making same | 0 |
2016/0254,247 | 2016 | Fan-out WLP with package | 0 |
9337165 | 2016 | Method for manufacturing a fan-out WLP with package | 0 |
2016/0005,711 | 2016 | SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME | 2 |
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