Pang-Chun Liu
Inventor
Stats
- 1 US patents issued
- 6 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 1 US Patents Issued
- 6 US Applications Filed
- 19 Total Citation Count
- Jul 1, 2024 Most Recent Filing
- Mar 23, 2007 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| Gooten Innolife Corporation | 1
1 | 2007
2008 |
Inventor Addresses
| Address | Duration |
|---|---|
| Hsinchu County, TW | Dec 12, 24 - Dec 12, 24 |
| New Taipei City, TW | Jul 21, 16 - Jul 21, 16 |
| New Taipei, TW | Sep 20, 16 - Sep 20, 16 |
| Taichung County, TW | Sep 10, 09 - Sep 10, 09 |
| Taoyuan City, TW | Jun 01, 23 - Oct 24, 24 |
| Taoyuan, TW | Aug 13, 24 - Aug 13, 24 |
| Taya Hsiang, TW | - |
Technology Profile
| Technology | Matters | |
|---|---|---|
| B08B: | CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL | 1 |
| G01N: | INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES | 1 |
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2024/0410,884 | 2024 | BIOLOGICAL DETECTION CHIP | 0 |
| 2024/0355,912 | 2024 | MEMORY DEVICE WITH MAGNETIC TUNNEL JUNCTION | 0 |
| 12062713 | 2024 | Memory device and forming method thereof | 0 |
| 2023/0170,403 | 2023 | MEMORY DEVICE AND FORMING METHOD THEREOF | 0 |
| 9449136 | 2016 | Integrated circuit layout structure and method having different cell row heights with different row ratios for area optimization | 5 |
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