Jeffrey S Leal
Inventor
Stats
- 9 US patents issued
- 13 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 9 US Patents Issued
- 13 US Applications Filed
- 268 Total Citation Count
- Sep 30, 2015 Most Recent Filing
- May 20, 2008 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| VERTICAL CIRCUITS (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC | 1
1 | 2008
2009 |
| INVENSAS CORPORATION | 1
8 4 2 1 4 | 2008
2010 2011 2012 2014 2015 |
Inventor Addresses
| Address | Duration |
|---|---|
| Santa Cruz, CA, US | Mar 12, 09 - Aug 20, 09 |
| Scotts Valley, CA, US | Jun 10, 10 - Nov 29, 16 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 13 |
| H05K: | PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 9508689 | 2016 | Electrical connector between die pad and z-interconnect for stacked die assemblies | 2 |
| 9490230 | 2016 | Selective die electrical insulation by additive process | 0 |
| 2016/0027,761 | 2016 | ELECTRICAL CONNECTOR BETWEEN DIE PAD AND Z-INTERCONNECT FOR STACKED DIE ASSEMBLIES | 4 |
| 2016/0020,188 | 2016 | SELECTIVE DIE ELECTRICAL INSULATION BY ADDITIVE PROCESS | 2 |
| 9196588 | 2015 | EMI shield | 44 |
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