Chih-Yu Lai
Inventor
Stats
- 20 US patents issued
- 60 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 20 US Patents Issued
- 60 US Applications Filed
- 296 Total Citation Count
- Nov 5, 2024 Most Recent Filing
- Jun 17, 2008 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. | 2
6 2 6 8 8 6 3 | 2008
2011 2012 2013 2014 2015 2016 2017 |
| Fon Chin Industrial Co., Ltd. | 1
| 2008
|
Inventor Addresses
| Address | Duration |
|---|---|
| Hsinchu County, TW | Nov 30, 23 - Nov 30, 23 |
| Hsinchu, TW | Sep 29, 22 - Apr 01, 25 |
| TAINAN CITY, TW | Sep 21, 17 - Nov 21, 24 |
| Taibao, TW | Nov 10, 09 - Nov 10, 09 |
| Tainan City, TW | Jun 03, 10 - Oct 31, 24 |
| Tainan, TW | Nov 01, 11 - Sep 10, 24 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| A47C: | CHAIRS | 1 |
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 6 |
| H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 59 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 12266594 | 2025 | Method of making semiconductor device having self-aligned interconnect structure | 0 |
| 12243822 | 2025 | Method of manufacturing integrated circuit | 0 |
| 2025/0062,195 | 2025 | SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED INTERCONNECT STRUCTURE | 0 |
| 12218058 | 2025 | Integrated circuits having stacked transistors and backside power nodes | 0 |
| 2024/0395,670 | 2024 | METHOD OF MAKING SEMICONDUCTOR DEVICE | 0 |
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