Zhizheng Liu
Inventor
Stats
- 50 US patents issued
- 54 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 50 US Patents Issued
- 54 US Applications Filed
- 1159 Total Citation Count
- May 8, 2023 Most Recent Filing
- Apr 30, 2001 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
LINEAGE POWER CORPORATION | 2
| 2006
|
VALLEY DEVICE MANAGEMENT | 1
2 | 2004
2008 |
DELTA ELECTRONICS, INC. | 2
| 2001
|
MONTEREY RESEARCH, LLC | 2
3 1 4 10 4 | 2002
2004 2005 2006 2007 2010 |
GENERAL ELECTRIC COMPANY | 2
| 2006
|
LINEAR TECHNOLOGY CORPORATION | 2
| 2009
|
SPANSION LLC | 2
| 2013
|
CYPRESS SEMICONDUCTOR CORPORATION | 9
4 2 5 10 9 4 2 2 2 3 | 2002
2003 2004 2005 2006 2007 2009 2010 2011 2012 2013 |
Inventor Addresses
Address | Duration |
---|---|
Fremont, CA, US | Dec 30, 10 - Mar 07, 24 |
San Jose, CA | Nov 30, 06 - Jul 01, 08 |
San Jose, CA, US | Jan 11, 07 - Oct 27, 15 |
Shanghai, CN | Mar 21, 02 - Oct 07, 08 |
Sunnyvale, CA | Sep 30, 03 - May 08, 07 |
Sunnyvale, CA, US | Jun 03, 04 - Dec 28, 06 |
Technology Profile
Technology | Matters | |
---|---|---|
G05F: | SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES | 1 |
G11C: | STATIC STORES | 35 |
H01F: | MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES | 1 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
2024/0080,977 | 2024 | INDUCTOR WITH INTEGRATED CONDUCTORS FOR POWER MODULES | 0 |
9171936 | 2015 | Barrier region underlying source/drain regions for dual-bit memory devices | 0 |
9153596 | 2015 | Adjacent wordline disturb reduction using boron/indium implant | 0 |
9142311 | 2015 | Screening for reference cells in a memory | 0 |
2015/0103,601 | 2015 | MULTI-PASS SOFT PROGRAMMING | 0 |
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