Chi-Te Lin
Inventor
Stats
- 0 US patents issued
- 9 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 0 US Patents Issued
- 9 US Applications Filed
- 21 Total Citation Count
- Sep 22, 2023 Most Recent Filing
- Oct 14, 2011 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| NOVATEK MICROELECTRONICS CORP. | 1
| 2013
|
| WISTRON NEWEB CORP. | 1
| 2014
|
| SONIX TECHNOLOGY CO., LTD. | 1
| 2011
|
Inventor Addresses
| Address | Duration |
|---|---|
| HSINCHU, TW | Jul 27, 23 - Jul 27, 23 |
| Hsinchu City, TW | Apr 04, 24 - Mar 27, 25 |
| Hsinchu County, TW | Jul 03, 14 - Jul 03, 14 |
| Hsinchu, TW | Feb 12, 15 - Mar 13, 25 |
| Taichung City, TW | Apr 26, 12 - Apr 26, 12 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 2 |
| H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 4 |
| H04B: | TRANSMISSION | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2025/0107,215 | 2025 | FRONT-END-OF-LINE (FEOL) CAPACITOR STRUCTURE | 0 |
| 2025/0089,324 | 2025 | METHODS FOR FORMING GATE OXIDE LAYER FOR HIGH-VOLTAGE TRANSISTOR | 0 |
| 2025/0081,509 | 2025 | GATE DIELECTRIC FEATURES IN HIGH-VOLTAGE IC DEVICES AND METHODS OF FORMING THE SAME | 0 |
| 12224790 | 2025 | Radio frequency front-end system for reducing interference and method for reducing interference | 0 |
| 2024/0113,187 | 2024 | COMPOSITE GATE DIELECTRIC FOR HIGH-VOLTAGE DEVICE | 0 |
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